Addition of VBIC model support to analog simulation tool delivers faster, more accurate SiGe device simulation
 

T-Spice v10.0 takes Tanner EDA into the power and wireless markets

San Diego, California – June 7, 2004 –Tanner EDA, a division of Tanner Research, announces support for Vertical Bipolar Inter-Company (VBIC) bipolar junction transistor models in a new version of its enhanced analog and mixed-signal IC simulation tool, T-Spice Pro v10.0.

VBIC models, which are available from most foundries for their SiGe processes, are now widely used by designers of power devices, including ICs for wireless/RF applications. They overcome many of the inherent weaknesses of industry-standard SPICE Gummel-Poon (SGP) models and offer improved modelling accuracy with respect to Early effects, quasi-saturation, parasitic effects, avalanche multiplication, and temperature dependency.

As a result of the upgrade, T-Spice Pro v10.0 will now deliver greater simulation accuracy for designs that utilize SiGe transistors, minimizing design errors and cutting design iterations. The addition of VBIC support to T-Spice Pro v10.0 gives Tanner greater access to the high-growth power and wireless design markets.

The T-Spice Pro v10.0 VBIC model implementation includes support for all simulation modes including DC, transient, AC and noise analysis. Improvements have been made to the VBIC model for increased convergence with no loss of accuracy. Consequently, design productivity is enhanced.

T-Spice Pro v10.0 is a low-cost, Windows-based tool for simulation, schematic entry and waveform analysis of IC designs. It provides fast and accurate simulation of analog and mixed-signal designs within a tightly integrated design flow and offers comprehensive post-processing utilities. Designers can switch between fast, table-based model evaluation and more accurate, direct model evaluation. This permits selective control of design performance and accuracy. The tool has an easy-to-use graphical interface, is compatible with the latest foundry MOSFET and BJT processes and features HSPICE® and P-SPICE®-compatible input language.

T-Spice Pro v10.0 is available now with support provided for Windows 2000 and XP.

About Tanner EDA

Tanner EDA is a division of Tanner Research, Inc., a privately held company headquartered in Pasadena, California. Tanner EDA develops layout, verification and electronic simulation design software for analog and mixed-signal IC, MEMS and integrated optical designs on the Windows® platform. Tanner's HiPer Verify™, L-Edit Pro™ and T-Spice Pro™ tools provide a complete design flow including schematic entry, waveform probing, full-custom layout editing, placement and routing, LVS and DRC verification, netlist extraction and circuit simulation. Founded in 1988, Tanner Research, Inc. consists of three major divisions in addition to Tanner EDA.

Edtorial Contact: Bob Jones, Publitek Limited
(626) 792-3000